1. Field of the Invention
The present invention relates to a charge and discharge control circuit for controlling charge and discharge of a battery and a battery device including the charge and discharge control circuit.
2. Description of the Related Arts
These days, various mobile electronic devices are used. In such situation, each of the electronic devices is operated by an internal battery device. The battery device includes a charge and discharge control circuit for detecting overcharge and overdischarge of a battery or an overcurrent to control the charge and discharge of the battery, thereby realizing normal operation. A detection signal from each detection circuit is transferred to a control circuit through a delay circuit. The control circuit controls a switching element for controlling the charge and discharge. The delay circuit delays the detection signal in order to prevent erroneous detection. The delay circuit normally includes an oscillation circuit and a frequency division circuit and is provided common to the respective detection circuits in view of the circuit scale (see, for example, JP 2002-176730 A).
A conventional charge and discharge control circuit and a conventional battery device will be described. FIG. 4 is a schematic block diagram showing the conventional charge and discharge control circuit and the conventional battery device.
A battery device 200 includes a battery 201 having one end connected with an external terminal 204 and another end connected with an external terminal 205 via a switching circuit 203 capable of limiting a current. The battery 201 is connected in parallel with a charge and discharge control circuit 202 for detecting a voltage and a current of the battery 201 to control the charge and discharge of the battery 201. A charger 301 for charging the battery 201 or a load 302 is connected between the external terminal 204 and the external terminal 205.
The charge and discharge control circuit 202 includes an overcharge detection circuit 306 for generating an overcharge detection signal when the voltage of the battery 201 becomes equal to or larger than an upper limit of a chargeable voltage, an overdischarge detection circuit 307 for generating an overdischarge detection signal when the voltage of the battery 201 becomes smaller than a lower limit of the chargeable voltage, an overcurrent detection circuit 308 for generating an overcurrent detection signal when a current of the switching circuit 203 becomes equal to or larger than an upper limit current, a delay circuit 309 for calculating a delay time for each of the detection signals, and a logic circuit 305 for generating signals for controlling the switching circuit 203 based on the detection signals determined by the delay circuit 309.
The switching circuit 203 is controlled to turn off in the case of an overcharge state, an overdischarge state, or an overcurrent state, thereby stopping a charge current or a discharge current of the battery 201.
However, in each of the conventional charge and discharge control circuit and the conventional battery device, when the charger which performs pulse charging and the load are connected with the battery device, there is a problem in that a pseudo overcurrent state and a release are repeated in the overcharge state or the overdischarge state to hinder the normal operations of the charge and discharge control circuit and the battery device.
For example, when the charger 301 which performs intermittent pulse charging and the load 302 are simultaneously connected between the external terminals 204 and 205 in the overdischarge state, a pseudo discharge overcurrent may be generated even though a discharge current does not flow.
FIG. 3 shows the pseudo discharge overcurrent in the overdischarge state of the battery. In the overdischarge state, a discharging FET 303 is being turned OFF in response to an output of the logic circuit 305, so the discharge current does not flow. At this time, the charge current flows through a parasitic diode of the discharging FET 303. During a period Ton when there is a charge pulse from the charger 301, the charge current flows from the charger 301 to the battery 201, and a voltage at a terminal 103 has a voltage value smaller than a voltage value at a terminal 102 by that of a forward voltage Vf of the parasitic diode. During a period Toff when there is no charge pulse from the charger 301, both the discharge current and the charge current do not flow, so the voltage at the terminal 103 has a voltage value larger than the voltage value at the terminal 102 by that of a battery voltage Vbattery. When the voltage value of the larger value becomes equal to or larger than a predetermined value, the overcurrent detection circuit 308 determines that the charge overcurrent generates, so a pseudo discharge overcurrent state occurs. On the other hand, because the charge current flows from the charger 301 to the battery 201 during the period Ton when there is the charge pulse from the charger 301, the battery voltage becomes equal to or larger than a predetermined value, so the overdischarge detection circuit 307 determines that the overdischarging is released. A short time is normally set as an overcurrent delay time in order to prevent the short circuit of the load. Therefore, when the delay circuit is commonly used, the pseudo discharge overcurrent generates again before the lapse of the delay time for releasing the overdischarging. Thus, it is likely that the overdischarging cannot be released.
In such a state, the charging is continuously performed without releasing the discharge overcurrent state. Even when the voltage of the battery 201 becomes equal to or larger than the upper limit value, it is likely that the overcharge state cannot be detected. Even in the case of the overcharge state, the same problem occurs. Therefore, there may occur a case where the overcharge state and the overdischarge state are not reasonably released, with the result that the charge and discharge control circuit and the battery device cannot be normally operated, thereby reducing the safety.